In the EVA project (Design of Architecture Variants with Low Power Consumption) of the DFG priority program "Fundamentals and Procedures of Information Processing with Low Power Consumption" (VIVA) an asynchronous architecture is used as the analysis basis for minimizing power consumption. The asynchronous architecture enables component activation to be analyzed on the architecture level. This means that power consumption can be examined on a level close to the hardware. The results obtained by the asynchronous model on the architecture level are then transferred to synchronous design methodologies.
Project funded by: DFG
Project duration: 05/1999 - 04/2001
Project partners: University of Paderborn (D)