The DFG priority program "Fundamentals and Procedures of Information Processing with Low Power Consumption" (VIVA) uses an asynchronous architecture as an analysis basis for minimizing power consumption. The asynchronous architecture enables component activation to be analyzed on the architecture level. This means that power consumption can be examined on a level close to the hardware. 

Project funded by: DFG
Project duration: until 03/2005
Project partners: University of Paderborn (D)
Contact: C-LAB